Difference between revisions of "CSIT/CSIT LF testbed"

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== FD.IO CSIT testbed - Server HW Configuration ==
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This page has been deprecated. Content has been moved to [[CSIT/Testbeds:_Xeon_Hsw,_VIRL. | FD.io CSIT testbeds - Xeon Haswell, VIRL]].
 
+
CSIT testbed contains following three HW configuration types of UCS x86 servers, across total of ten servers provided:
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1. Type-1: Purpose - VPP functional and performance conformance testing.
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    - Quantity: 6 computers as SUT hosts (Systems Under Test).
+
    - Physical connectivity:
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        - CIMC and host management ports.
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        - NIC ports connected in 3-node topologies.
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    - Main HW configuration:
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        - Chassis: UCSC-C240-M4SX with 6 PCIe3.0 slots.
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        - Processors: 2* E5-2699 2.3 GHz.
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        - RAM Memory: 16* 32GB DDR4-2133MHz.
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        - Disks: 2* 2TB 12G SAS 7.2K RPM SFF HDD.
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    - NICs configuration:
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        - Right PCIe Riser Board (Riser 1) (x8, x8, x8 PCIe3.0 lanes)
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            - PCIe Slot1: Cisco VIC 1385 2p40GE.
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            - PCIe Slot2: Intel NIC x520 2p10GE.
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            - PCIe Slot3: empty.
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        - Left PCIe Riser Board (Riser 2) (x8, x16, x8 PCIe3.0 lanes)
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            - PCIe Slot4: Intel NIC xl710 2p40GE.
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            - PCIe Slot5: Intel NIC x710 2p10GE.
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            - PCIe Slot6: empty.
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        - MLOM slot: Cisco VIC 1227 2p10GE (x8 PCIe2.0 lanes).
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2. Type-2: Purpose - VPP functional and performance conformance testing.
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    - Quantity: 3 computers as TG hosts (Traffic Generators).
+
    - Physical connectivity:
+
        - CIMC and host management ports.
+
        - NIC ports connected in 3-node topologies.
+
    - Main HW configuration:
+
        - Chassis: UCSC-C240-M4SX with 6 PCIe3.0 slots.
+
        - Processors: 2* E5-2699 2.3 GHz.
+
        - RAM Memory: 16* 32GB DDR4-2133MHz.
+
        - Disks: 2* 2TB 12G SAS 7.2K RPM SFF HDD.
+
    - NICs configuration:
+
        - Right PCIe Riser Board (Riser 1) (x8, x8, x8 lanes)
+
            - PCIe Slot1: Intel NIC xl710 2p40GE.
+
            - PCIe Slot2: Intel NIC x710 2p10GE.
+
            - PCIe Slot3: Intel NIC x710 2p10GE.
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        - Left PCIe Riser Board (Riser 2) (x8, x16, x8 lanes)
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            - PCIe Slot4: Intel NIC xl710 2p40GE.
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            - PCIe Slot5: Intel NIC x710 2p10GE.
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            - PCIe Slot6: Intel NIC x710 2p10GE.
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        - MLOM slot: empty.
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3. Type-3: Purpose - VIRL functional conformance.
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    - Quantity: 1 computer as VIRL host.
+
    - Physical connectivity:
+
        - CIMC and host management ports.
+
        - no NIC ports, standalone setup.
+
    - Main HW configuration:
+
        - Chassis: UCSC-C240-M4SX with 6 PCIe3.0 slots.
+
        - Processors: 2* E5-2699 2.3 GHz.
+
        - RAM Memory: 16* 32GB DDR4-2133MHz.
+
        - Disks: 2* 480 GB 2.5inch 6G SATA SSD.
+
    - NICs configuration:
+
        - Right PCIe Riser Board (Riser 1) (x8, x8, x8 lanes)
+
            - no cards.
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        - Left PCIe Riser Board (Riser 2) (x8, x16, x8 lanes)
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            - no cards.
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        - MLOM slot: empty.
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== FD.IO CSIT Testbeds - Physical Connectivity ==
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Total of 10 UCSC-C240-M4SX servers is made available for FD.IO CSIT testbed.
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For management purposes, each server must have following two ports connected to the management network:
+
 
+
1. 1GE CIMC port
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    - CIMC - Cisco Integrated Management Controller.
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    - Required for provides embedded server management with WebUI, CLI, SNMPv3, IPMIv2.0.
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2. 1GE management port
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    - hostOS management port.
+
 
+
=== Naming Convention ===
+
 
+
Following naming convention is used within this page to specify physical connectivity and wiring across defined CSIT testbeds:
+
 
+
- testbedname: testbedN.
+
- hostname:
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    - traffic-generator: tN-tgW.
+
    - system-under-testX: tN-sutX.
+
- portnames:
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    - tN-tgW-cY/pZ.
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    - tN-sutX-cY/pZ.
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- where:
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    - N - testbed number.
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    - tgW - server acts as traffic-generator with W index.
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    - sutX - server acts as system-under-test with X index.
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    - Y - PCIe slot number denoting a NIC card number within the host.
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        - Y=1,2,3 - slots in Riser 1, Right PCIe Riser Board, NUMA node 0.
+
        - Y=4,5,6 - slots in Riser 2, Left PCIe Riser Board, NUMA node 1.
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        - Y=m - the MLOM slot.
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    - Z - port number on the NIC card.
+
 
+
=== 3-node Topology Testbeds for Functional and Performance Conformance ===
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+
Nine servers are used to build three of 3-node topologies, with each topology using two servers of Type-1 (SUT function) and one server of Type-2 (TG function). Server NIC cards are placed and NIC ports are connected using the scheme defined in next sections.
+
 
+
=== CIMC and Management networks ===
+
 
+
Each server has a CIMC and a Management port, which are connected to two different VLANs.
+
 
+
1. CIMC Vlan:
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    - Subnet: 10.30.50.0/24
+
    - Gateway: 10.30.50.1
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    - Broadcast: 10.30.50.255
+
    - DNS1: 199.204.44.24
+
    - DNS2: 199.204.47.54
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2. Management Vlan:
+
    - Subnet: 10.30.51.0/24
+
    - Gateway: 10.30.51.1
+
    - Broadcast: 10.30.51.255
+
    - DNS1: 199.204.44.24
+
    - DNS2: 199.204.47.54
+
 
+
To access these hosts, an VPN connection is required.
+
 
+
=== Testbeds1,2,3 Server and Ports Naming and NIC Placement ===
+
 
+
Each server in 3-node Topology has its NIC cards placed, and NIC cards and ports indexed using defined naming convention:
+
 
+
1. Server1 of Type-1:
+
    - testbedname: testbed1.
+
    - hostname: t1-sut1.
+
    - CIMC IP: 10.30.50.17
+
    - Host IP: 10.30.51.17
+
    - portnames:
+
        - t1-sut1-c1/p1 - 10GE port1 on Intel NIC x520 2p10GE.
+
        - t1-sut1-c1/p2 - 10GE port2 on Intel NIC x520 2p10GE.
+
        - t1-sut1-c2/p1 - 40GE port1 on Cisco VIC 1385 2p40GE.
+
        - t1-sut1-c2/p2 - 40GE port2 on Cisco VIC 1385 2p40GE.
+
        - t1-sut1-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t1-sut1-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t1-sut1-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t1-sut1-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t1-sut1-cm/p1 - 10GE port1 on Cisco VIC 1227 2p10GE.
+
        - t1-sut1-cm/p2 - 10GE port2 on Cisco VIC 1227 2p10GE.
+
2. Server2 of Type-1:
+
    - testbedname: testbed1.
+
    - hostname: t1-sut2.
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    - CIMC IP: 10.30.50.18
+
    - Host IP: 10.30.51.18
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    - portnames:
+
        - t1-sut2-c1/p1 - 10GE port1 on Intel NIC x520 2p10GE.
+
        - t1-sut2-c1/p2 - 10GE port2 on Intel NIC x520 2p10GE.
+
        - t1-sut2-c2/p1 - 40GE port1 on Cisco VIC 1385 2p40GE.
+
        - t1-sut2-c2/p2 - 40GE port2 on Cisco VIC 1385 2p40GE.
+
        - t1-sut2-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t1-sut2-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t1-sut2-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t1-sut2-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t1-sut2-cm/p1 - 10GE port1 on Cisco VIC 1227 2p10GE.
+
        - t1-sut2-cm/p2 - 10GE port2 on Cisco VIC 1227 2p10GE.
+
3. Server3 of Type-2:
+
    - testbedname: testbed1.
+
    - hostname: t1-tg1.
+
    - CIMC IP: 10.30.50.16
+
    - Host IP: 10.30.51.16
+
    - portnames:
+
        - t1-tg1-c1/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t1-tg1-c1/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t1-tg1-c2/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t1-tg1-c2/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t1-tg1-c3/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t1-tg1-c3/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t1-tg1-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t1-tg1-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t1-tg1-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t1-tg1-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t1-tg1-c6/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t1-tg1-c6/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
4. Server4 of Type-1:
+
    - testbedname: testbed2.
+
    - hostname: t2-sut1.
+
    - CIMC IP: 10.30.50.21
+
    - Host IP: 10.30.51.21
+
    - portnames:
+
        - t2-sut1-c1/p1 - 10GE port1 on Intel NIC x520 2p10GE.
+
        - t2-sut1-c1/p2 - 10GE port2 on Intel NIC x520 2p10GE.
+
        - t2-sut1-c2/p1 - 40GE port1 on Cisco VIC 1385 2p40GE.
+
        - t2-sut1-c2/p2 - 40GE port2 on Cisco VIC 1385 2p40GE.
+
        - t2-sut1-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t2-sut1-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t2-sut1-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t2-sut1-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t2-sut1-cm/p1 - 10GE port1 on Cisco VIC 1227 2p10GE.
+
        - t2-sut1-cm/p2 - 10GE port2 on Cisco VIC 1227 2p10GE.
+
5. Server5 of Type-1:
+
    - testbedname: testbed2.
+
    - hostname: t2-sut2.
+
    - CIMC IP: 10.30.50.22
+
    - Host IP: 10.30.51.22
+
    - portnames:
+
        - t2-sut2-c1/p1 - 10GE port1 on Intel NIC x520 2p10GE.
+
        - t2-sut2-c1/p2 - 10GE port2 on Intel NIC x520 2p10GE.
+
        - t2-sut2-c2/p1 - 40GE port1 on Cisco VIC 1385 2p40GE.
+
        - t2-sut2-c2/p2 - 40GE port2 on Cisco VIC 1385 2p40GE.
+
        - t2-sut2-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t2-sut2-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t2-sut2-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t2-sut2-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t2-sut2-cm/p1 - 10GE port1 on Cisco VIC 1227 2p10GE.
+
        - t2-sut2-cm/p2 - 10GE port2 on Cisco VIC 1227 2p10GE.
+
6. Server6 of Type-2:
+
    - testbedname: testbed2.
+
    - hostname: t2-tg1.
+
    - CIMC IP: 10.30.50.20
+
    - Host IP: 10.30.51.20
+
    - portnames:
+
        - t2-tg1-c1/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t2-tg1-c1/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t2-tg1-c2/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t2-tg1-c2/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t2-tg1-c3/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t2-tg1-c3/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t2-tg1-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t2-tg1-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t2-tg1-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t2-tg1-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t2-tg1-c6/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t2-tg1-c6/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
7. Server7 of Type-1:
+
    - testbedname: testbed3.
+
    - hostname: t3-sut1.
+
    - CIMC IP: 10.30.50.25
+
    - Host IP: 10.30.51.25
+
    - portnames:
+
        - t3-sut1-c1/p1 - 10GE port1 on Intel NIC x520 2p10GE.
+
        - t3-sut1-c1/p2 - 10GE port2 on Intel NIC x520 2p10GE.
+
        - t3-sut1-c2/p1 - 40GE port1 on Cisco VIC 1385 2p40GE.
+
        - t3-sut1-c2/p2 - 40GE port2 on Cisco VIC 1385 2p40GE.
+
        - t3-sut1-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t3-sut1-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t3-sut1-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t3-sut1-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t3-sut1-cm/p1 - 10GE port1 on Cisco VIC 1227 2p10GE.
+
        - t3-sut1-cm/p2 - 10GE port2 on Cisco VIC 1227 2p10GE.
+
8. Server8 of Type-1:
+
    - testbedname: testbed3.
+
    - hostname: t3-sut2.
+
    - CIMC IP: 10.30.50.26
+
    - Host IP: 10.30.51.26
+
    - portnames:
+
        - t3-sut2-c1/p1 - 10GE port1 on Intel NIC x520 2p10GE.
+
        - t3-sut2-c1/p2 - 10GE port2 on Intel NIC x520 2p10GE.
+
        - t3-sut2-c2/p1 - 40GE port1 on Cisco VIC 1385 2p40GE.
+
        - t3-sut2-c2/p2 - 40GE port2 on Cisco VIC 1385 2p40GE.
+
        - t3-sut2-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t3-sut2-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t3-sut2-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t3-sut2-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t3-sut2-cm/p1 - 10GE port1 on Cisco VIC 1227 2p10GE.
+
        - t3-sut2-cm/p2 - 10GE port2 on Cisco VIC 1227 2p10GE.
+
9. Server9 of Type-2:
+
    - testbedname: testbed3.
+
    - hostname: t3-tg1.
+
    - CIMC IP: 10.30.50.24
+
    - Host IP: 10.30.51.24
+
    - portnames:
+
        - t3-tg1-c1/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t3-tg1-c1/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t3-tg1-c2/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t3-tg1-c2/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t3-tg1-c3/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t3-tg1-c3/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t3-tg1-c4/p1 - 40GE port1 on Intel NIC xl710 2p40GE.
+
        - t3-tg1-c4/p2 - 40GE port2 on Intel NIC xl710 2p40GE.
+
        - t3-tg1-c5/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t3-tg1-c5/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
        - t3-tg1-c6/p1 - 10GE port1 on Intel NIC x710 2p10GE.
+
        - t3-tg1-c6/p2 - 10GE port2 on Intel NIC x710 2p10GE.
+
 
+
=== Testbeds1,2,3 Server and Ports Physical Connectivity ===
+
 
+
Listed nine servers are connected into the three of 3-node testbeds, testbed1, testbed2 and testbed3, using defined naming convention as follows:
+
 
+
1. testbed1:
+
    - ring of 40GE ports on Cisco VIC 1385 2p40GE on SUTs
+
        - t1-tg1-c1/p1 to t1-sut1-c1/p2.
+
        - t1-sut1-c1/p1 to t1-sut2-c1/p2.
+
        - t1-sut2-c1/p1 to t1-tg1-c1/p2.
+
    - ring of 10GE ports on Intel NIC x520 2p10GE on SUTs
+
        - t1-tg1-c2/p1 to t1-sut1-c2/p2.
+
        - t1-sut1-c2/p1 to t1-sut2-c2/p2.
+
        - t1-sut2-c2/p1 to t1-tg1-c2/p2.
+
    - ring of 40GE ports on Intel NIC xl710 2p40GE on SUTs
+
        - t1-tg1-c4/p1 to t1-sut1-c4/p2.
+
        - t1-sut1-c4/p1 to t1-sut2-c4/p2.
+
        - t1-sut2-c4/p1 to t1-tg1-c4/p2.
+
    - ring of 10GE ports on Intel NIC x710 2p10GE on SUTs
+
        - t1-tg1-c5/p1 to t1-sut1-c5/p2.
+
        - t1-sut1-c5/p1 to t1-sut2-c5/p2.
+
        - t1-sut2-c5/p1 to t1-tg1-c5/p2.
+
    - ring of 10GE ports on Cisco VIC 1227 2p10GE on SUTs
+
        - t1-tg1-c2/p1 to t1-sut1-cm/p2.
+
        - t1-sut1-cm/p1 to t1-sut2-cm/p2.
+
        - t1-sut2-cm/p1 to t1-tg1-c2/p2.
+
    - TG loopback ports Intel NIC x710 2p10GE
+
        - t1-tg1-c6/p1 to t1-tg1-c6/p2.
+
 
+
2. testbed2:
+
    - ring of 40GE ports on Cisco VIC 1385 2p40GE on SUTs
+
        - t2-tg1-c1/p1 to t2-sut1-c1/p2.
+
        - t2-sut1-c1/p1 to t2-sut2-c1/p2.
+
        - t2-sut2-c1/p1 to t2-tg1-c1/p2.
+
    - ring of 10GE ports on Intel NIC x520 2p10GE on SUTs
+
        - t2-tg1-c2/p1 to t2-sut1-c2/p2.
+
        - t2-sut1-c2/p1 to t2-sut2-c2/p2.
+
        - t2-sut2-c2/p1 to t2-tg1-c2/p2.
+
    - ring of 40GE ports on Intel NIC xl710 2p40GE on SUTs
+
        - t2-tg1-c4/p1 to t2-sut1-c4/p2.
+
        - t2-sut1-c4/p1 to t2-sut2-c4/p2.
+
        - t2-sut2-c4/p1 to t2-tg1-c4/p2.
+
    - ring of 10GE ports on Intel NIC x710 2p10GE on SUTs
+
        - t2-tg1-c5/p1 to t2-sut1-c5/p2.
+
        - t2-sut1-c5/p1 to t2-sut2-c5/p2.
+
        - t2-sut2-c5/p1 to t2-tg1-c5/p2.
+
    - ring of 10GE ports on Cisco VIC 1227 2p10GE on SUTs
+
        - t2-tg1-c2/p1 to t2-sut1-cm/p2.
+
        - t2-sut1-cm/p1 to t2-sut2-cm/p2.
+
        - t2-sut2-cm/p1 to t2-tg1-c2/p2.
+
    - TG loopback ports Intel NIC x710 2p10GE
+
        - t2-tg1-c6/p1 to t2-tg1-c6/p2.
+
 
+
3. testbed3:
+
    - ring of 40GE ports on Cisco VIC 1385 2p40GE on SUTs
+
        - t3-tg1-c1/p1 to t3-sut1-c1/p2.
+
        - t3-sut1-c1/p1 to t3-sut2-c1/p2.
+
        - t3-sut2-c1/p1 to t3-tg1-c1/p2.
+
    - ring of 10GE ports on Intel NIC x520 2p10GE on SUTs
+
        - t3-tg1-c2/p1 to t3-sut1-c2/p2.
+
        - t3-sut1-c2/p1 to t3-sut2-c2/p2.
+
        - t3-sut2-c2/p1 to t3-tg1-c2/p2.
+
    - ring of 40GE ports on Intel NIC xl710 2p40GE on SUTs
+
        - t3-tg1-c4/p1 to t3-sut1-c4/p2.
+
        - t3-sut1-c4/p1 to t3-sut2-c4/p2.
+
        - t3-sut2-c4/p1 to t3-tg1-c4/p2.
+
    - ring of 10GE ports on Intel NIC x710 2p10GE on SUTs
+
        - t3-tg1-c5/p1 to t3-sut1-c5/p2.
+
        - t3-sut1-c5/p1 to t3-sut2-c5/p2.
+
        - t3-sut2-c5/p1 to t3-tg1-c5/p2.
+
    - ring of 10GE ports on Cisco VIC 1227 2p10GE on SUTs
+
        - t3-tg1-c2/p1 to t3-sut1-cm/p2.
+
        - t3-sut1-cm/p1 to t3-sut2-cm/p2.
+
        - t3-sut2-cm/p1 to t3-tg1-c2/p2.
+
    - TG loopback ports Intel NIC x710 2p10GE
+
        - t3-tg1-c6/p1 to t3-tg1-c6/p2.
+

Latest revision as of 18:17, 13 August 2018

This page has been deprecated. Content has been moved to FD.io CSIT testbeds - Xeon Haswell, VIRL.