Difference between revisions of "Archived-P4vpp"
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| + | |||
| + | == Getting Involved == | ||
| + | |||
| + | [https://wiki.fd.io/view/P4vpp/Meetings P4VPP Project Meetings] | ||
== Intro == | == Intro == | ||
| − | P4 is a domain specific language that allows developers to write packet processing applications for a variety of architectures, including Switching ASICs, Network Processors and CPUs. The P4VPP project will enable these capabilities to be mapped onto the FD.io VPP dataplane software platform. The P4VPP project will build a P4 toolchain that maps the user supplied P4 program onto a FD.io VPP software platform, thereby minimizing the effort to create new features, and moving the complexity of achieving performance to the P4 compiler. | + | P4 is a domain specific language that allows developers to write packet processing applications for a variety of architectures, including Switching ASICs, Network Processors and CPUs. For background reading on the P4 architecture, including the language specification and Compiler implementation, please go to [http://p4.org P4.org]. |
| + | |||
| + | The P4VPP project will enable these capabilities to be mapped onto the FD.io VPP dataplane software platform. The P4VPP project will build a P4 toolchain that maps the user supplied P4 program onto a FD.io VPP software platform, thereby minimizing the effort to create new features, and moving the complexity of achieving performance to the P4 compiler. | ||
The goal of this project will be to create a functional framework first and foremost, and enable ongoing development to further optimize the performance results from the P4C VPP compiler backend. | The goal of this project will be to create a functional framework first and foremost, and enable ongoing development to further optimize the performance results from the P4C VPP compiler backend. | ||
| − | * P4VPP Kickoff Slides | + | More details around the project overview and scope can be found here: |
| + | |||
| + | * [https://wiki.fd.io/images/9/90/P4VPP_FDIO_Kickoff.pdf P4VPP Kickoff Slides] | ||
| + | |||
| + | A simple view of the flow of P4 programs through the P4VPP compiler and into the VPP platform is shown below: | ||
| + | |||
| + | [[File:P4VPP Concept.png|600px]] | ||
| + | |||
| + | The initial work associated with the P4VPP project started as a Research project at Stanford and Cornell. More details on this research and the associated results can be found here: | ||
| + | |||
| + | * [https://sosr17demos.hotcrp.com/doc/sosr17demos-final19.pdf SOSR17 PVPP Poster] | ||
| + | * [http://stanford.edu/~yo2seol/static/pvpp-apnet.pdf APNET17 PVPP Paper] | ||
== Project Contact Name and Email == | == Project Contact Name and Email == | ||
| Line 47: | Line 64: | ||
== Devel == | == Devel == | ||
| − | + | '''Getting the code''' | |
| + | |||
| + | git clone https://gerrit.fd.io/r/p4vpp | ||
| + | |||
| + | '''Building and Installing the P4VPP Compiler''' | ||
| + | |||
| + | '''Sample P4 programs''' | ||
| − | + | '''Compiling and Testing P4 programs''' | |
| − | + | == Documentation == | |
| − | + | [[P4VPP/Termination Review | P4VPP/Termination Review]] | |
Latest revision as of 20:47, 10 November 2020
| P4VPP Facts |
|
Project Lead: Skip Booth
Repository: git clone https://gerrit.fd.io/r/p4vpp |
Contents
Getting Involved
Intro
P4 is a domain specific language that allows developers to write packet processing applications for a variety of architectures, including Switching ASICs, Network Processors and CPUs. For background reading on the P4 architecture, including the language specification and Compiler implementation, please go to P4.org.
The P4VPP project will enable these capabilities to be mapped onto the FD.io VPP dataplane software platform. The P4VPP project will build a P4 toolchain that maps the user supplied P4 program onto a FD.io VPP software platform, thereby minimizing the effort to create new features, and moving the complexity of achieving performance to the P4 compiler.
The goal of this project will be to create a functional framework first and foremost, and enable ongoing development to further optimize the performance results from the P4C VPP compiler backend.
More details around the project overview and scope can be found here:
A simple view of the flow of P4 programs through the P4VPP compiler and into the VPP platform is shown below:
The initial work associated with the P4VPP project started as a Research project at Stanford and Cornell. More details on this research and the associated results can be found here:
Project Contact Name and Email
Scope
The scope of the P4VPP project will be the creation of software tools that are necessary to enable a P4 program to compile and run on the FD.io VPP software platform. This minimally will include the target specific extensions to the p4.org P4C compiler to target the VPP platform, both in terms of the data-plane and the control plane interfaces. The packaging of the compiler artifacts will target a VPP plug-in model, allowing for out-of-tree development, packaging, and release.
The project contributions will target the following capabilities:
- P4C Compiler Backend that targets the VPP Software Platform, including both the data-plane packet manipulations, as well as the control plane interface into table/action population.
- Generalized VPP libraries that can be used by the P4 compiler. These libraries will minimally include P4 table lookups (exact, ternary, range, and lpm) and P4 stateful memories such as counters and registers.
- Low-level Performance instrumentation that can be used to measure and validate the results of compiler optimizations.
- Compiler generation for API definition and backend implementation for all configurable parts of the P4 program, specifically match tables and action parameters
- Toolchain generation of VPP specific build environment and plugin instrumentation that allows P4 programs to be built out-of-tree, and dynamically loaded into the VPP execution context.
- P4 Program Fragments that can be used to test the P4VPP backend functional correctness.
- P4 Programs and associated test harnesses that represent the VPP CSIT functional and performance test cases. The goal being to establish functional equivalency and performance baselines that can be used to compare the correctness of the compiler as well as the performance results.
Out of scope:
Performance
More details to be filled in as more functionality is put in place...: [1]
Release Plan
TBD
Devel
Getting the code
git clone https://gerrit.fd.io/r/p4vpp
Building and Installing the P4VPP Compiler
Sample P4 programs
Compiling and Testing P4 programs
