Difference between revisions of "VPP/AArch64"
From fd.io
< VPP
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+ | == Plan == | ||
+ | |||
+ | * <code>make test</code> | ||
+ | * src/vppinfra/cache.h - aarch64 is always 128B cache block size | ||
+ | * src/vppinfra/cpu.[ch] - need ARM feature detection & "show cpu" output | ||
+ | * src/vppinfra/time.[ch] - review ARM architected timer / use cntfrq_el0 instead of estimation | ||
+ | * src/vppinfra/smp.h - use "isb" or "yield" inst | ||
+ | * src/vppinfra/byte_order.h - use "rev" inst | ||
+ | * review __sync use for non-x86/TSO machines; "TCP shared-memory fifos, event logger, etc." | ||
+ | * bihash_8_8.h - crc32 vs xxhash | ||
+ | * string.h - memcpy (inlined by compiler) perf | ||
+ | * SIMD | ||
+ | * quad loop / dual loop optimizations e.g. l2_forward() - hide memory latency | ||
+ | |||
+ | == CSIT == | ||
== Patches == | == Patches == | ||
{| class="wikitable" | {| class="wikitable" | ||
+ | | lb plugin - fix format() type mismatches || Merged 10/16 || https://gerrit.fd.io/r/#/c/8755/ | ||
+ | |- | ||
| Use AESNI=y only on x86_64 machines || Merged 10/14 || https://gerrit.fd.io/r/#/c/8622/ | | Use AESNI=y only on x86_64 machines || Merged 10/14 || https://gerrit.fd.io/r/#/c/8622/ | ||
|- | |- | ||
Line 9: | Line 26: | ||
| Native arm64 build: dpdk/Makefile change || Merged 8/31 || https://gerrit.fd.io/r/#/c/8228/ | | Native arm64 build: dpdk/Makefile change || Merged 8/31 || https://gerrit.fd.io/r/#/c/8228/ | ||
|} | |} | ||
+ | |||
+ | == Known Issues == | ||
+ | |||
+ | GCC 5.3.x ICEs during FP register allocation. Please use GCC 5.4+. |
Revision as of 20:16, 17 October 2017
Contents
[hide]Plan
-
make test
- src/vppinfra/cache.h - aarch64 is always 128B cache block size
- src/vppinfra/cpu.[ch] - need ARM feature detection & "show cpu" output
- src/vppinfra/time.[ch] - review ARM architected timer / use cntfrq_el0 instead of estimation
- src/vppinfra/smp.h - use "isb" or "yield" inst
- src/vppinfra/byte_order.h - use "rev" inst
- review __sync use for non-x86/TSO machines; "TCP shared-memory fifos, event logger, etc."
- bihash_8_8.h - crc32 vs xxhash
- string.h - memcpy (inlined by compiler) perf
- SIMD
- quad loop / dual loop optimizations e.g. l2_forward() - hide memory latency
CSIT
Patches
lb plugin - fix format() type mismatches | Merged 10/16 | https://gerrit.fd.io/r/#/c/8755/ |
Use AESNI=y only on x86_64 machines | Merged 10/14 | https://gerrit.fd.io/r/#/c/8622/ |
Improved arm64 chip detection | Merged 9/11 | https://gerrit.fd.io/r/#/c/8372/ |
Native arm64 build: dpdk/Makefile change | Merged 8/31 | https://gerrit.fd.io/r/#/c/8228/ |
Known Issues
GCC 5.3.x ICEs during FP register allocation. Please use GCC 5.4+.