VPP/AArch64

Plan

make test status:

infinite loop:

* TestLB.test_lb_ip4_gre4
* TestLB.test_lb_ip4_gre6
* TestLB.test_lb_ip6_gre4
* TestLB.test_lb_ip6_gre6

fail:

* TestIp4VrfMultiInst.test_ip4_vrf_02
* TestIP6VrfMultiInst.test_ip6_vrf_02
* TestIPv4FibCrud.test_2_del_routes
* TestIPv4FibCrud.test_3_add_new_routes
* TestJVpp.test_vpp_ioamtrace_future_api
* TestJVpp.test_vpp_snat_future_api
* TestL2bdArpTerm.test_l2bd_arp_term_02
* TestL2bdArpTerm.test_l2bd_arp_term_04
* TestL2bdArpTerm.test_l2bd_arp_term_10
* TestL2bdArpTerm.test_l2bd_arp_term_11
* TestL2bdArpTerm.test_l2bd_arp_term_13
* TestL2bdArpTerm.test_l2bd_arp_term_14
* TestL2bdMultiInst.test_l2bd_inst_02
* TestL2bdMultiInst.test_l2bd_inst_03
* TestL2fib.test_l2_fib_02
* TestL2fib.test_l2_fib_04

• src/vppinfra/cache.h - aarch64 is always 128B cache block size
• src/vppinfra/cpu.[ch] - need ARM feature detection & "show cpu" output
• src/vppinfra/time.[ch] - review ARM architected timer / use cntfrq_el0 instead of estimation
• src/vppinfra/smp.h - use "isb" or "yield" inst
• src/vppinfra/byte_order.h - use "rev" inst
• review __sync use for non-x86/TSO machines; "TCP shared-memory fifos, event logger, etc."
• bihash_8_8.h - crc32 vs xxhash
• string.h - memcpy (inlined by compiler) perf
• SIMD
• quad loop / dual loop optimizations e.g. l2_forward() - hide memory latency

Patches

lb plugin - fix format() type mismatches	Merged 10/16	https://gerrit.fd.io/r/#/c/8755/
Use AESNI=y only on x86_64 machines	Merged 10/14	https://gerrit.fd.io/r/#/c/8622/
Improved arm64 chip detection	Merged 9/11	https://gerrit.fd.io/r/#/c/8372/
Native arm64 build: dpdk/Makefile change	Merged 8/31	https://gerrit.fd.io/r/#/c/8228/

Known Issues

GCC 5.3.x ICEs during FP register allocation. Please use GCC 5.4+.